NASA Jet Propulsion Laboratory, California Institute of Technology

Groundbreaking for new Microdevices Laboratory at Jet Propulsion Laboratory is scheduled for 8:30 a.m. PST January 21, Dr. Lew Allen, JPL Director, announced.

On the same day, Memorandum of Understanding signed by NASA Administrator Dr. James Fletcher, and Dr. Marvin Goldberger, President of California Institute of Technology, will establish the Center for Space Microelectronics Technology at JPL.

The Center will provide long range supporting research and development in advanced microelectronics for wide range of U.S. space related efforts, particularly for NASA and Department of Defense space missions. "The Center for Space Microelectronics Technology will make JPL national center for excellence in selected parts of space microelectronics," Allen said.

JPL is division of Caltech, operated for NASA, as NASA's lead center for planetary and other space science missions. Caltech faculty collaboration will be principal feature of the Center for Space Microelectronics.

At the request of NASA Associate Administrator Dr. Burton Edelson in July 1983, JPL established the Advanced Microelectronics Program (AMP) under the direction of Dr. Carl Kukkonen to emphasize computational and device electronic research unique to JPL's, NASA and DoD responsibilities. The Center for Space Microelectronics Technology will replace and build upon the progress made by the Advanced Microelectronics Program. Kukkonen will be the Center Director.

Highlights of the JPL Advanced Microelectronics Program during 1986 included fabrication of superconducting tunnel junction detector for submilllimeter wave astronomy.

The program also built and operated Scanning Tunneling Microscope (STM) for study of electronic microdevices. The STM was developed at IBM and the inventors were awarded the 1986 Nobel Prize in Physics. The microscope provides imaging of solid surfaces at magnification of 100 million so that single atoms can be easily resolved. JPL is the first U.S. Government laboratory to have this unique surface analysis and imaging capability. second JPL STM was developed to operate at liquid helium temperatures (4 or 452 F) and was used to tunnel into three different superconductors.

The Advanced Microelectronics Program has designed and fabricated an electronic embodiment of neural network that imitates some of the characteristics of the human brain. The electronic neural network exhibits associative recall, content addressability and fault tolerance.

Also, major progress has been made in concurrent computation. Commercial versions of the hypercube concurrent computer, developed at Caltech, are now being marketed by four companies and 100 have been installed world-wide.

Forty concurrent applications have been run on JPL hypercubes. This experience has established general techniques for mapping scientific problems into concurrent computers, and determined design criteria for future machines. These criteria were used to design the JPL Mark III hypercube, the first general purpose concurrent supercomputer, which has been operational since May 1986.

Current research in the Advanced Microelectronics Program is sponsored by NASA, DoD and DoE.

The new Microdevices Laboratory, 38,000 square feet, three-story structure, will house clean rooms and conventional laboratories and offices for about 60 people, and two conference rooms.

The Center for Space Microelectronics' solid state device research activities will be located in the new building. Devices created and developed in the Microdevices Laboratory through proof-of-concept stage will be turned over to private industry for manufacture.

All work in the center will be unclassified and research results will be publicized in the appropriate technical literature.

Design and engineering of the Microdevices Laboratory was completed in 1986 by the JPL staff in collaboration with the architecture and engineering contractor, Anderson, DeBartolo, Pan, Inc., of Tucson, Ariz.

Occupancy of the $9 million structure is expected in early 1988.

The Center for Space Microelectronics Technology will be directed by Board of Governors chaired by Dr. Allen. Other members of the board include Dr. Goldberger; Dr. Edelson, NASA Associate Administrator, Office of Space Science and Applications; Dr. Ray Colladay, NASA Associate Administrator, Office of Aeronautics and Space Technology, and Dr. James Ionson, Director of the Innovative Science Technology Office, Strategic Defense Initiative Organization.

Dr. Terry Cole, JPL Chief Technologist, will introduce speakers and guests at the groundbreaking ceremony. Remarks will be made by Drs. Allen, Goldberger and Edelson, and by Gen. Billie J. McGarvey, Director, Facilities Engineering Division, NASA.

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